verilog

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Description
Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.

The compiler can target either simulation, or netlist (EDIF).

This is a dummy transitional package that will ensure a proper upgrade path. This package may be safely removed after upgrading.
Available deb Repositories (how-to add a respository)
Debian 32-bit 64-bit
stable 0.9.2-2 0.9.2-2
testing 0.9.5-1 0.9.5-1
sid 0.9.5-1 0.9.5-1

Ubuntu 32-bit 64-bit
hardy 0.8.5-1 0.8.5-1
lucid 0.9.2-1 0.9.2-1
oneiric 0.9.4-1 0.9.4-1
precise 0.9.5-1 0.9.5-1

InstallInstall Now (what is this?)
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